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Home > News > (Invited) SiC Lateral MOSFETs Implemented on Semi-Insulating Substrate
(Invited) SiC Lateral MOSFETs Implemented on Semi-Insulating Substrate

 4H-SiC lateral metal-oxide-semiconductor field effect transistor (MOSFET) were fabricated on on-axis high purity semi-insulating (HPSI) SiC substrate without using epitaxial layer. The lateral MOSFET adopted current path layer (CPL) between gate and drain region for obtain MOSFET characteristics. The CPL was formed by ion-implantation and acts like a drift region of the conventional lateral MOSFET. By using semi-insulating substrate and CPL, 1093 V of breakdown voltage (BV) and 89.8 mΩcenterdotcm2 of specific on-resistance (Ron,sp) were obtained with 20 μm long CPL. Experimentally extracted field-effect channel mobility was 21.7 cm2/Vcenterdots and the figure-of-merit (FoM, BV2/Ron,sp) was 13.3 MW/cm2.

source: iopscience

 

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